N-nodeU design
From emboxit
Contents
LPC11U68
- http://www.nxp.com/products/microcontrollers/cortex_m0_m0/lpc1100/series/LPC11U00.html#products
- http://www.nxp.com/products/microcontrollers/cortex_m0_m0/lpc1100/LPC11U24FBD48.html
- http://www.nxp.com/documents/data_sheet/LPC11U2X.pdf
- http://www.nxp.com/documents/data_sheet/LPC11U6X.pdf
- http://www.lpcware.com/content/forum/re-invoke-usb-bootloader-lpc11u68
Good news everyone, some of the guys over at mbed solved it! It turns out that as soon as an interrupt is used in the mbed library, VTOR gets remapped to the bottom of the SRAM. Calling SCB->VTOR = 0; restores it to reset default and now ReinvokeISP works!
- http://www.embeddedartists.com/products/lpcxpresso/lpc11U68_xpr.php
- http://www.embeddedartists.com/sites/default/files/support/xpr/LPC11U68_Xpresso_v2_Schematic_Rev_B.pdf
- http://www.nxp.com/documents/user_manual/UM10732.pdf
This part is enumerated as a Mass Storage Class (MSC) device to a PC or another embedded system. In order to connect via the USB interface, the part must use the external crystal at a frequency of 12 MHz. The MSC device presents an easy integration with the PC’s operating system. The part’s flash memory space is represented as a drive in the host file system. The entire available user flash is mapped to a file of the size of the part’s flash in the host’s folder with the default name ‘firmware.bin’. The ‘firmware.bin’ file can be deleted and a new file can be copied into the directory, thereby updating the user code in flash. Note that the filename of the new flash image file is not important. After a reset or a power cycle, the new file is visible in the host’s file system under it’s default name ‘firmware.bin’.
PIO0_1 —...A LOW level on this pin during reset starts the ISP command handler or the USB device enumeration.
PIO0_3 —... A LOW level on this pin during reset starts the ISP command handler. A HIGH level during reset starts the USB device enumeration.
NCP702
Linear Voltage Regulator, LDO, Ultra Low Iq, Ultra Low Noise, 200 mA
- No load current 10uA
- Shutdown current 1uA
- Input voltage 2 to 5.5V
- Dropout Voltage 140mV
- http://www.onsemi.com/PowerSolutions/product.do?id=NCP702
- http://www.mouser.ie/ProductDetail/ON-Semiconductor/NCP702SN31T1G/?qs=sGAEpiMZZMsGz1a6aV8DcIR7jEr5%2fIlduumw1Skf16Q%3d
- http://www.mouser.com/ds/2/308/NCP702-D-254627.pdf
MLCC
- SMALLEST AVAILABLE SIZE FOR 47uF IS 0805
10 uF AVAILABLE IN 0402
- http://www.mouser.ie/ProductDetail/Murata-Electronics/GRM21BR60J476ME15L/?qs=sGAEpiMZZMvsSlwiRhF8qimdIfvLNU7od09iBAe%252b2Sg%3d
- http://www.digikey.ie/product-detail/en/CL21A476MQCLRNC/1276-2420-1-ND/3890506
- http://www.mouser.ie/Passive-Components/Capacitors/MLCCs/Multilayer-Ceramic-Capacitors-MLCC-SMD-SMT/_/N-bw5t7?P=1yx8e91Z1yzmouc&Keyword=10UF+0402&FS=True
Choke
- 470uH 300mA 0603
- Bourns 600 Ohm 300mA 3.2mm x 1.6mm
- 1206 (3.2x1.6mm = 3216 metric) Common mode choke
- TDK MPZ1608S601A
Ferrite Chip Bead Impedance: 600 Ohms Maximum DC Current: 1 A 0603 (1608 metric) Test Frequency: 100 MHz
SPI
DM1000 GPIO 5 / 6 are sampled / latched on the rising edge of the RSTn pin to determine the SPI mode. They are internally pulled low to configure a default SPI mode 0 without the use of external components. If a mode other 0 is required then they should be pulled up using an external resistor of value no greater than 10 kΩ to the VDDIO output supply.
mbed The default settings of the SPI interface are 1MHz, 8-bit, Mode 0 The SPI Interface can be used to write data words out of the SPI port, returning the data received back from the SPI slave. The SPI clock frequency and format can also be configured. The format is set to data word length 8 to 16 bits, and the mode as per the table below: Mode Polarity Phase 0 0 0 1 0 1 2 1 0 3 1 1 The SPI master generates a clock to synchronously drive a serial bit stream slave. The slave returns a bit stream, also synchronous to the clock.
USB common mode
